The semiconductor industry has recently experienced technological advances that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes for integrated circuit devices. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors operating at speeds of hundreds of millions of instructions per second to be packaged in relatively small, air-cooled semiconductor device packages. A byproduct of these technological advances has been an increased demand for semiconductor-based products, as well as increased demand for these products to be fast, reliable, and inexpensive. These and other demands have led to increased pressure to manufacture a large number of semiconductor devices at an efficient pace while increasing the complexity and improving the reliability of the devices.
As the manufacturing processes for semiconductor devices and integrated circuits increase in difficulty, methods for testing and debugging these devices become increasingly important. Not only is it important to ensure that individual chips are functional, it is also important to ensure that batches of chips perform consistently. In addition, the ability to detect a defective manufacturing process early is helpful for reducing the possibility of manufacturing a defective device.
Sometimes it is helpful to access certain nodes or to reconfigure conductors in an integrated circuit die for failure analysis, design debug, or other testing purposes. This access is generally done by removing a portion of material from the die to access the node, or exposing the node by creating an access hole and subsequently depositing a metal to electrically access the node. These access holes need to have high aspect ratios. Removing silicon, such as by milling trenches having high aspect ratios, is slow and almost impractical for silicon thickness greater than 10 microns. In addition, there is a possibility of damaging the integrated circuit if the milling process is not accurately controlled.
One particular type of integrated circuit device that requires removal of material from the die for accessing the integrated circuit is the flip-chip die. Flip-chip dies include bonding pads that have metal (solder) bumps through which electrical connection to a package is made when the die is “flipped” over and soldered to the package. Each bump connects to a corresponding package inner lead. The resulting packages are low profile, have low electrical resistance and a short electrical path. The output terminals of the package, which are sometimes ball-shaped conductive bump contacts, are typically disposed in a rectangular array. These packages are occasionally referred to as “Ball Grid Array” (BGA) packages. Alternatively, the output terminals of the package may be pins and such packages are commonly known as pin grid array (PGA) packages.
Once the die is attached to such a package, the back side portion of the die remains exposed. The transistors and other circuitry are generally formed in a very thin, epitaxially-grown silicon layer on a single crystal silicon wafer from which the die is singulated. The side of the die including the epitaxial layer containing the transistors, and the other active circuitry is often referred to as the circuit side of the die or front side of the die. The circuit side of the die is positioned very near the package and opposes the back side of the die. Between the back side and the circuit side of the die is silicon.
The positioning of the circuit side near the package provides many advantages. However, in some instances orienting the die with the circuit side face down on a substrate is disadvantageous. Due to this orientation of the die, the transistors and circuitry near the circuit side are not directly accessible for testing, modification or other purposes. Therefore, access to the transistors and circuitry near the circuit side is through material in the back side of the chip. Successful access to the circuitry requires accurate and controllable removal of the material in the back side.
In addition to accessing circuitry in a flip-chip die via the backside of the die, accessing through the circuit side of flip-chips, or accessing circuitry in other types of integrated circuit dies may also require the removal of material. Accessing the circuitry is important for analysis at various stages of manufacture of the devices, including post-manufacturing analysis.
For these and other reasons, a method and system for controlled removal of material from IC devices would be beneficial for analyzing the devices. In particular, it is important to have the ability to determine the endpoint of the removal process with sufficient accuracy to avoid milling off or otherwise damaging the node to which access is being sought. Such damage can inhibit further device analysis, or can result in analysis information that is inaccurate or misleading. In addition, it is also important to detect how far the removal process has proceeded in order to more efficiently and more accurately control the removal process.